1. Field of the Disclosure
The present disclosure relates to a display device, and more particularly, to a display device including a driving unit having power output pads between data or gate signal output pads.
2. Discussion of the Related Art
An organic light-emitting diode (OLED) display device, which is one of flat panel displays (FPDs), has the characteristics of high brightness and a low operating voltage.
The OLED display device generally has a high contrast ratio since it is a self-luminous device, can be implemented as an ultra thin display, can easily reproduce moving pictures due to its response time of several microseconds (μs), has no limitation of a viewing angle, and can stably operate at a low temperature. Also, since the OLED display device can be driven at a low direct current voltage of 5V to 15V, it is easy to manufacture and design a driving circuit with the OLED display device.
Furthermore, the OLED display device can be manufactured through a simple manufacturing process including only deposition and encapsulation.
However, since the OLED display device has a current mode of emitting light by supplying electric current to light-emitting diodes, it is necessary to supply various high voltages to individual pixel areas through an integrated power line.
The integrated power line of the OLED display device will be described with reference to FIGS. 1 and 2. Particularly, FIG. 1 is a view of showing a related art OLED display device, and FIG. 2 is an enlarged view of an area A of FIG. 1 with second integrated power lines 52 not shown.
As shown in FIG. 1, the related art OLED display device 10 includes a light-emitting diode panel 20 which displays images, and a plurality of gate drivers (not shown) and a plurality of data drivers 30 which are connected to the light-emitting diode panel 20 to supply gate signals and data signals, respectively.
The light-emitting diode panel 20 includes a display area DA having a plurality of pixel areas P, and a non-display area NDA surrounding the display area DA. The display area DA includes a plurality of first power lines 54 for supplying a first voltage to the plurality of pixel areas P (e.g., P1, P2, etc.). The non-display area NDA includes first integrated power lines 50 connected to the first power lines 54 to transmit the first voltage provided from an external circuit via the data drivers 30 to the first power lines 54.
Although not shown in FIGS. 1 and 2, the display area DA further includes a plurality of second power lines for supplying a second voltage to the pixel areas P. The non-display area NDA further includes the second integrated power lines 52 connected to the second power lines to transmit the second voltage from an external circuit to the second power lines.
Each data driver 30 may be formed in the form of a chip on film (COF) in which a driving integrated circuit (DIC) 34 is mounted on a film 32, like a tape carrier package (TCP).
Further, first power supply lines 36, to which the first voltage from the external circuit is supplied, are formed at both ends of each data driver 30, and the first power supply lines 36 are connected to one of the first integrated power lines 50.
Also, a transmission unit 40 such as a film on glass (FOG) may be connected to the light-emitting diode panel 20, and a second power supply line 42 is formed on the transmission unit 40 and is connected to one of the second integrated power lines 52.
In more detail, as shown in FIG. 2, each of the plurality of data drivers 30 includes a film 32 and a driving integrated circuit 34 mounted on the film 32. A plurality of data input lines 34a, a plurality of data output lines 34b, the first power supply lines 36, and a plurality of output pads 38 are formed on the film 32.
The data input lines 34a input image data and data control signals supplied from the external circuit to the driving integrated circuit 34. The data output lines 34b transmit a plurality of data signals outputted from the driving integrated circuit 34 to the light-emitting diode panel 20. The first power supply lines 36 are formed at both sides of each driving integrated circuit 34 and transmit the first voltage provided from the external circuit to the light-emitting diode panel 20.
In addition, the output pads 38 are connected to one ends of the data output lines 34b and the first power supply lines 36.
Here, the data input lines 34a, the data output lines 34b and the first power supply lines 36 are formed between two insulating layers of the film 32 as electric lines. The output pads 38 are exposed through a lower surface of the film 32 and contact lines of the light-emitting diode panel 20.
Meanwhile, the first integrated power lines 50, power supply lines 51, the plurality of first power lines 54, and the plurality of data lines 60 are formed in the light-emitting diode panel 20.
The power supply lines 51 are connected to the output pads 38, which contact the one ends of the first power supply lines 36, and one of the first integrated power lines 50 to transmit the first voltage from the first power supply lines 36 to the corresponding first integrated power line 50. Each of the plurality of first power lines 54, which is formed between adjacent first and second pixel areas P1 and P2, is connected to the first integrated power lines 50 and is supplied with the first voltage.
The data lines 60 are connected to the output pads 38, which contact the data output lines 34b, and the pixel areas P, and transmit the data signals from the data output lines 34b to the pixel areas P.
In the related art OLED display device 10, the first and second voltages may be a supply voltage VDD and a ground voltage VSS, respectively. Since the first and second voltages are supplied to all of the pixel areas P of the light-emitting diode panel 20 through one first integrated power line 50 and one second integrated power line 52, an excessive amount of current flows through the first integrated power line 50 and the second integrated power line 52. For instance, a single integrated power line 50 is connected to all of the power lines 54 of the entire pixel areas P of the light-emitting diode panel 20, and all the power supply lines 36 are connected to the single integrated power line 50. In the related art OLED display device 10, both the first and second integrated power lines 50 and 52 are formed outside the film 32 and are not formed on or under the film 32.
Accordingly, the first integrated power line 50 and the second integrated power line 52 may be electrically open or burned, or electrically shorted with other lines due to the breakdown of their upper or lower insulating layers, which can degrade the performance of the OLED display device 10. Further the failure of the first integrated power line 50 and/or the second integrated power line 52 may be propagated to the first power lines 54 or the second power lines, which can further degrade the performance of the OLED display device 10.
In particular, in the case of a large sized OLED display requiring a larger amount of driving current, such a failure becomes a serious problem.